Dogboned BGA

This is the PCIe board that I have been working on for a while.  Its the one with the Xilinx FPGA, and then the chip in question is a PEX8311 from PLX.  Its a 377 pin, 1mm pitch, micro BGA.  Its also the first BGA package I've put on a design.  This is the first fanout of the BGA.  I used Via in Pad techniques that ultimately led to a lot of manufacturing trouble.

This is what I am calling a Pinned BGA.  I figured that a direct connect approach was best so I designed a through hole padstack to mount a BGA.  The idea was to fill the holes and finish plate the top of the padstack where the BGAs solder ball are attached.  This worked good the first couple of times we manufactured these boards, at a shop that had the filled and plated via capability.  The third time we fabricated these boards, at a shop that did not have filled and plated via capability, there was big trouble.  The boards got to the people that do the BGA assembly, and got rejected.  We spent a lot of time trying to rectify this problem.  So, now I am reworking this board to use regular vias, and loosing my fancy padstack.

This is the revision layout.  We did a typical BGA fanout on a 1mm grid.  The BGA pads are only on the top of the board, and we get all the signals down to the layer with a via.  The outer two layers of the BGA can fanout on the surface, and they don't necessarily need vias.  This technique frees up space under the BGA for routing control and power traces.  This design is also matched impedance with all signal layers only about 5 mils from a plane.  Oh yeah, this fanout technique is called dogboning a BGA...